Note that the Lattice FPGA requires a license for iCEcube2. This is free for hobbyists. Scroll to the bottom of this page for current details.

If you're looking for the original Cu, click here.

Features

• ICE40HX8K-CB132 FPGA
• 79 - 3.3V IO pins broken out across two headers
• Control Header
  • 8 IO pins also connected to on-board LEDs
  • 1 IO pin also connected to on-board reset button
  • Configuration SPI signals
  • Raw power input/3.3V regulated output
• QWIIC connector (shares pins on bank B)
• 100MHz oscillator
• 8 general purpose LEDs
• 1 button (typically used as reset)
• 32MBit Configuration FLASH
• FT2232HQ USB -> JTAG and USB -> UART (12Mbaud max)
• 5-12V input voltage on-board power supply
  
  • 3.3V @ 3A (IO)
  • 1.2V @ 3A (VCCINT)

Documents

• Schematic
• 3D Model (STEP)
• Drawing (Connector Positions)
• Simplified 3D Model (STEP)
• iCE40 HX Family Data Sheet
• All Lattice iCE40 Documentation